Alif Semiconductor /AE512F80F55D5AS_CM55_HE_View /LPI2S /I2S_ISR0

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Interpret as I2S_ISR0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)RXDA 0 (Val_0x0)RXFO 0 (Val_0x0)TXFE 0 (Val_0x0)TXFO

TXFE=Val_0x0, RXFO=Val_0x0, TXFO=Val_0x0, RXDA=Val_0x0

Description

Interrupt Status Register 0

Fields

RXDA

Status of Receive Data Available Interrupt. This bit denotes the status of the RX FIFO trigger level.

0 (Val_0x0): RX FIFO trigger level is not reached

1 (Val_0x1): RX FIFO trigger level is reached

RXFO

Status of Data Overrun Interrupt for the RX Channel. Incoming data lost due to a full RX FIFO.

0 (Val_0x0): RX FIFO write valid

1 (Val_0x1): RX FIFO write overrun

TXFE

Status of Transmit Empty Trigger Interrupt. This bit specifies whether the TX FIFO trigger level has reached or not (TX FIFO is empty).

0 (Val_0x0): TX FIFO trigger level is reached

1 (Val_0x1): TX FIFO trigger level is not reached

TXFO

Status of Data Overrun Interrupt for the TX Channel. This bit specifies whether the TX FIFO write is valid or an overrun (attempt to write to full TX FIFO).

0 (Val_0x0): TX FIFO write valid

1 (Val_0x1): TX FIFO write overrun

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